There is no
guarantee expressed or implied that the
information contained herein is correct. Use at your own risk.
"Putting mo' axe in yo' co-ax since 1979!" Information
provided here is just that: information. If you use it to break the law,
then YOU, indeed, have broken the law.
CCI3001
Fin | 1 | 18 | FIL |
Vdd | 2 | 17 | FIL |
RI | 3 | 16 | P0 |
RO | 4 | 15 | P1 |
Vss | 5 | 14 | P2 |
AO | 6 | 13 | P3 |
AI | 7 | 12 | P4 |
** | 8 | 11 | P5 |
PD | 9 | 10 | P6 |
* R=1, T=0. Shifts down 455 KHZ in Transmit mode.
** Control used to turn off the Mixer IC input between TX and RX.
Obsolete Chip using binary inputs and ROM.
NC | 1 | 18 | *** |
Vss | 2 | 17 | ** |
VCO | 3 | 16 | Vss |
VCO | 4 | 15 | Vdd |
T/R* | 5 | 14 | P0 |
PD | 6 | 13 | P1 |
P5 | 7 | 12 | P2 |
P4 | 8 | 11 | P3 |
RI | 9 | 10 | RO |
*R=1, T=0
**27 MHz out to TX amps.
***17 MHz out to RX Mixer.
Obsolete chip using binary inputs. Unique in that it contains its own mixer for the VCO.
SEG-A | 1 | 22 | **** |
SEG-B | 2 | 21 | NC |
SEG-C | 3 | 20 | Setp*** |
SEG-D | 4 | 19 | CH. 9 |
SEG-E | 5 | 18 | T/R** |
SEG-F | 6 | 17 | LD* |
SEG-G | 7 | 16 | PD Out |
SEG-H | 8 | 15 | AI |
RI | 9 | 14 | AO |
RO | 10 | 13 | Vdd |
Vss | 11 | 12 | Fin |
*1=Locked, 0=Unlocked
**1-TX, 0=RX
***1=Step Up, 0=Step Down
****LED Bar/Graph Multiplex Out
The latest AM/FM type chip, identical in mixing to the TC9109. Note this chip uses a single data bit to step up or step down,
eliminating the expensive BCD type channel selector switch. Like the SM5123A/SM5123B, this contains the LED drivers within the chip.
NOT easily modified.
HD42851
(Hitachi)
P1 | 1 | 24 | MC (usually unconnected) |
P2 | 2 | 23 | Vss |
P3 | 3 | 22 | LD** |
P4 | 4 | 21 | PD Out |
P5 | 5 | 20 | AI |
P6 | 6 | 19 | AO |
P7 | 7 | 18 | PD in from Programmable Divider |
P8 | 8 | 17 | Reference Divider Out |
1/2R | 9 | 16 | PD in from Reference Divider |
RI | 10 | 15 | Programmable Divider Out |
RO | 11 | 14 | FS |
Vdd | 12 | 13 | Fin |
*1=10 KHz Steps, 0=5 KHz Steps
**1=Locked, 0=Unlocked
An interesting chip that is easy to mistake for the mPD861 as the pinout is almost identical. With pin 14 LOW, N-codeis pure 8-bit binary with a range of N=53-308. With Pin 14 HIGH,range is N=3-191. If pin 14 is HIGH and pins 7 and 8 are LOW,programming is BCD with standard N-code of 91-135.
Many internal functions brought out to IC pins for easier troubleshooting.
Easy modification by changing the binary programming.
LC7110
(Sanyo)
Vdd | 1 | 20 | Vss |
Fin | 2 | 19 | P1 |
RB | 3 | 18 | P2 |
RI | 4 | 17 | P3 |
RO | 5 | 16 | P4 |
** | 6 | 15 | P5 |
AO | 7 | 14 | P6 |
AI | 8 | 13 | P7 |
PD | 9 | 12 | P8 |
LD* | 10 | 11 | P9 |
1=Locked, 0=Unlocked
**Tied High
An obsolete chip with internal ROM and binary inputs. As used in most models, N=150 (CH.1) to 194 (CH.40).
LC7120
(Sanyo)
P1 | 1 | 20 | Vss |
P2 | 2 | 19 | AO |
P3 | 3 | 18 | AI |
P4 | 4 | 17 | PD |
P5 | 5 | 16 | LD1 |
P6 | 6 | 15 | LD2 |
IFS* | 7 | 14 | Fin |
T/R** | 8 | 13 | 1/2R |
Vdd | 9 | 12 | RB |
RI | 10 | 11 | RO |
*1=10.695 MHz IF, 0=9.785 MHz IF
**R=1, T=0
One of the later BCD/ROM chips now finding its way into European rigs. The programming, IFS, and T/R pins use internal pull-down resistors.
Chip uses 5 KHz divider steps. LD1 is active LOW; LD2 is active HIGH. Several N-Code sets are possible depending upon AM or SSB use
and choice of IF, very similar to mPD2810. Examples for AM circuits: For 10.695 MHz IF, N-codes are 182 to 270 (RX) and 273 to 361 (TX);
For 9.785 MHz IF, N-codes are 364-452 (RX) and 273 to 361 (TX). Notice the 455 KHz may shift up or down on TX relative to whether the
IF is operating above or below the 10.24 MHz mixing signal. For SSB use, the T/R and ½R pins are not used;
Instead a separate crystal oscillator provides the loop mixing. Most SSB chassis using this chip or the mPD858
(and some with MC145106 or mPD2824) have identical main chassis; the PLL chip is the only difference and all are designed
for straight 91 to 135 N-code division.
LC 7113
(Sanyo)
Vdd | 1 | 16 | Vss |
Fin | 2 | 15 | P1 |
1/2R | 3 | 14 | P2 |
RI | 4 | 13 | P3 |
RO | 5 | 12 | P4 |
FS** | 6 | 11 | P5 |
PD | 7 | 10 | P6 |
LD* | 8 | 9 | P7 |
*1=locked, 0=unlocked
**1=¸1024, 0=¸1152
An obsolete chip used in a very expensive rig. Uses 7-bit binary programming with internal pull-down resistors.
Pin 9 presets the counter as follows: Pin 9 HIGH, 64 + N: Pin 9 LOW, 128 + N.
Mods: Only 19 high channels because of N!
LC7132
(Sanyo)
P1 | 1 | 20 | T/R** |
P2 | 2 | 19 | Fin |
P3 | 3 | 18 | Vdd |
P4 | 4 | 17 | AO |
P5 | 5 | 16 | AI |
P6 | 6 | 15 | PD |
P7 | 7 | 14 | LD*** |
P8 | 8 | 13 | Vss |
CH9* | 9 | 12 | RO |
Test | 10 | 11 | RI |
*Ch 9 called up when HIGH
**R=1, T=0
***1=locked, 0=unlocked
Newer AM-only type chip, identical to the TC9109 and MB8733. ROM Controlled with direct VCO division.
Note now it uses 8 program lines rather than 6, with the Ch.19 recall feature pin of the LC7130/31 series removed;
only the Ch. 9 recall feature is retained. Found mainly in the Korean-made
Maxon chassis.
NOT modifiable by normal methods.
LC7130/31 - US
LC7135 - EEC
LC7136/37 - UK
(Sanyo)
P1 | 1 | 20 | T/R** |
P2 | 2 | 19 | Fin |
P3 | 3 | 18 | Vdd |
P4 | 4 | 17 | AO |
P5 | 5 | 16 | AI |
P6 | 6 | 15 | PD |
Test | 7 | 14 | LD*** |
CH19* | 8 | 13 | Vss |
CH9* | 9 | 12 | RO |
MC | 10 | 11 | RI |
*CH 9 and 19 called up when pins are HIGH.
**R=1, T=0
***1=locked, 0=unlocked
1. For LC7130, LD and MC are active HIGH; for LC7131/35/36/37, active LOW.
2. LC7131 and LC7137 can be interfaced to LC7181/LC7191 scanning system.
3. All chips use direct VCO division, ROM, 5 KHz steps and single 10.240 MHz crystal.
4. LC7135 contains only the first 22 FCC channels in ROM for European Specs.
5. Channel Input codes are all BCD.
6. US and UK differ only in ROM N-codes.
Impossible to Modify!
M58472P
(Mitsubishi)
P4 | 1 | 18 | Vdd |
P5 | 2 | 17 | P3 |
P6 | 3 | 16 | P2 |
Fin | 4 | 15 | P1 |
RI | 5 | 14 | *** |
NC | 6 | 13 | NC |
LD* | 7 | 12 | **** |
** | 8 | 11 | PD |
Vss | 9 | 10 | FIL |
*1=unlocked, 0=locked
**Tied Low
***1 presets 147 + N, 0 presets 102 + N
****Tied High
Obsolete chip with binary inputs. Reference Oscillator was 5.12 MHz.
Used 5 KHz internal dividers.
Easy modification by changing the loop mixing crystal.
M58473P
(Mitsubishi)
P4 | 1 | 18 | Vdd |
P5 | 2 | 17 | P3 |
P6 | 3 | 16 | P2 |
Fin | 4 | 15 | P1 |
RI | 5 | 14 | ** |
RO | 6 | 13 | PD |
NC | 7 | 12 | ** |
LD* | 8 | 11 | PD |
Vss | 9 | 10 | FIL |
*1=unlocked, 0=locked
**1=¸147, 0=¸203 + N
Obsolete chip with binary inputs and code converter.
Easy modification by changing the loop mixing crystal.
RCI (Ranger) Now Makes a clone of this chip called the RCI8719
AO-2 | 1 | 18 | Vss |
AI-2 | 2 | 17 | Fin |
AO-1 | 3 | 16 | P1 |
AI-1 | 4 | 15 | P2 |
PD | 5 | 14 | P3 |
LD* | 6 | 13 | P4 |
RI | 7 | 12 | P5 |
RO | 8 | 11 | P6 |
Vdd | 9 | 10 | ** |
*1=locked, 0=unlocked
**1=64 + N for use with the 11.125 MHz crystal, 0=128 + N for use with 11.3258 MHz crystal.
This function not present in MB8734. US Models Only.
Pin 10 preset function normally pulls up HIGH. 6-bit binary inputs. Pull-up resistors used.
Used in the most popular Uniden chassis ever made. Still in current use worldwide,
where it's been adopted to provide 80 or 120 channels and FM. All chassis very similar and FM/Loop Crystal PC boards often
wired separately in the foreign models, or a pair of MC14008 binary
adders is used to preset the chip's N-codes, extending its range to cover 120 channels with one loop crystal.
Easiest modification is by control of pin 10, or by adding new loop crystals. If MB8734 is used, it must be replaced by MB8719 first.
MC145106 (Motorola)
MC55106/116/126 (National)
RCI (Ranger) now makes a clone of this chip called the RCI145106
Vdd | 1 | 18 | Vss |
Fin | 2 | 17 | P0 |
RI | 3 | 16 | P1 |
RO | 4 | 15 | P2 |
1/2R | 5 | 14 | P3 |
FS* | 6 | 13 | P4 |
PD | 7 | 12 | P5 |
LD** | 8 | 11 | P6 |
P8 | 9 | 10 | P7 |
*1 = 10 KHz Steps, 0 = 5 Khz Steps
**1 = Locked, 0 = Unlocked
The full pinout version of the Motorola series. Uses simple 9-bit binary programming
with internal pull-down resistors on those pins. Foreign models often use two MC14008 binary adders to preset
the program pins; this allows use of up to 120 channels with a standard 40-channel detent switch. Output of PD is negative-going;
i.e., output is high level with low frequency input to Programmable Divider, and low level when input signal frequency is high.
MC14568 and MC14526
(Motorola)
MC14568 is a Phase Comparator and Programmable Binary Counter; MC14526 is a 4-bit ¸N Programmable Counter only.
Both required to make up the 8-bit N-codes.
The weight of the pins is:
MC14586 | MC14526 |
Pin 4 - 128 bit | Pin 2 - 8 bit |
Pin 5 - 64 bit | Pin 14 - 4 bit |
Pin 6 - 32 bit | Pin 11 - 2 bit |
Pin 7 - 16 bit | Pin 5 - 1 bit |
An example of an early PLL device that required several discrete chips to form the loop.
In the NDI chassis, these were replaced by a single NDC40013 chip.
MM55108
(National)
Vdd | 1 | 18 | Vss |
Fin | 2 | 17 | P1 |
RI | 3 | 16 | P2 |
RO | 4 | 15 | P3 |
1/2R | 5 | 14 | T/R** |
RB | 6 | 13 | P4 |
PD | 7 | 12 | P5 |
LD* | 8 | 11 | P6 |
P8 | 9 | 10 | P7 |
* 1 = Locked, 0 = Unlocked
**R=1, T=0
An early National chip that never gained popularity in the US. Currently used in new UK FM rigs.
Uses 455 KHz T/R shift, but program address is simple binary for modification use, with internal
pull-down resistors on these pins. Negative-going PD output to VCO.
MSC42502P
(3301-201)
Fin | 1 | 16 | Vdd |
P4 | 2 | 15 | P5 |
P3 | 3 | 14 | P6 |
P2 | 4 | 13 | P7 |
P1 | 5 | 12 | P8 |
NC | 6 | 11 | RO |
PD | 7 | 10 | RI |
LD* | 8 | 9 | Vss |
* 1 = locked, 0 = Unlocked
An early chip custom-made for the E. F. Johnson Company. Uses BCD inputs and internal pull-up resistors on the programming pins.
The reference oscillator was always 5.12 MHz in this device.
Modification by changing the BCD programming.
MSM5807
(OKI Semiconductor)
P5 | 1 | 16 | Vdd |
P6 | 2 | 15 | P4 |
P7 | 3 | 14 | P3 |
P8 | 4 | 13 | P2 |
FS** | 5 | 12 | P1 |
RI | 6 | 11 | Fin |
RO | 7 | 10 | LD* |
Vss | 8 | 9 | PD |
*1 = Unlocked, 0 = Locked
**1 = ¸512, 0 = ¸1024
An obsolete chip.
Programming is binary with pull-down resistors on the pins.
MSM5907
(OKI Semiconductor)
P4 | 1 | 16 | Vdd |
P5 | 2 | 15 | P3 |
P6 | 3 | 14 | P2 |
P7 | 4 | 13 | P1 |
P8 | 5 | 12 | * |
* | 6 | 11 | Fin |
7 | 10 | ||
Vss | 8 | 9 |
*Tied LOW
A very early device, this is a Phase Comparator Divider only. Used in conjunction with the MSL2301 Presettable Divider,
in a manner similar to the MC14586/MC14526 loop where several discrete devices were needed.
Binary inputs are used. The signal that drives the VCO comes from the MSL2301.
NIS7261A
(Suwa Seiko)
Vdd | 1 | 16 | P0 |
Fin | 2 | 15 | P1 |
PD | 3 | 14 | P2 |
LD* | 4 | 13 | P3 |
NC | 5 | 12 | P4 |
RO | 6 | 11 | P5 |
RI | 7 | 10 | P6 |
Vss | 8 | 9 | P7 |
*1 = Locked, 0 = Unlocked
Both this chip and the NIS7264B are identical except for the Reference Oscillator crystals. This one uses
10.24 MHz. Programming is binary. Chip is obsolete.
NIS7264B
(Suwa Seiko)
Vdd | 1 | 16 | P0 |
Fin | 2 | 15 | P1 |
PD | 3 | 14 | P2 |
LD* | 4 | 13 | P3 |
NC | 5 | 12 | P4 |
RO | 6 | 11 | P5 |
RI | 7 | 10 | P6 |
Vss | 8 | 9 | P7 |
*1 = Locked, 0 = Unlocked
Uses 11.52 MHz reference crystal. Programming is binary. Chip is obsolete.
PLL01A
(NPC)
Vdd | 1 | 16 | P0 |
Fin | 2 | 15 | P1 |
RI | 3 | 14 | P2 |
NC | 4 | 13 | P3 |
PD Out | 5 | 12 | P4 |
PD In | 6 | 11 | P5 |
* | 7 | 10 | P6 |
P8 | 8 | 9 | P7 |
*Output of Programmable Divider to PD
An early predecessor to the PLL02A, before the chip technology got faster and more sophisticated.
Programming is straight 8-bit binary. Reference Oscillator was 6.40 MHz due to slower speed of dividers.
Used in a few old Cybernet chassis, such as PTBM027AOX and PTBM029AOX.
PLL02A (NPC)
MC145109 (Motorola)
AN/MN6040 (Panasonic)
SM5109 (NPC)
TC9100P (Toshiba)
ECG1233 (Sylvania)
Vdd | 1 | 16 | Vss |
Fin | 2 | 15 | P0 |
RI | 3 | 14 | P1 |
FS* | 4 | 13 | P2 |
PD | 5 | 12 | P3 |
LD** | 6 | 11 | P4 |
P8 | 7 | 10 | P5 |
P7 | 8 | 9 | P6 |
*1 = 10 KHz steps, 0 = 5 KHz steps
**1 = Locked, 0 = Unlocked
The most popular chip ever made. Still in worldwide use today. Chip is found in the Cybernet chassis.
A member of the Motorola family, it uses straight binary programming with internal pull-down resistors and a negative-going PD output.
Modification for additional channels is a simple matter of changing the programming or the loop mixing
crystal(s). The chip is widely used in the 18-channel Australian rigs, where the only real difference is in the Channel Selector switch.
PLL03A - US
PLL08A - EEC
(NPC)
Vdd | 1 | 16 | Vss |
RI | 2 | 15 | P0 |
LD1** | 3 | 14 | P1 |
LD2 | 4 | 13 | P2 |
LD3 | 5 | 12 | P3 |
PD | 6 | 11 | P4 |
T/R* | 7 | 10 | P5 |
Fin | 8 | 9 | P6 |
*T=1, R=0
**Three LDs present.
LD1 is active HIGH
LD2 is active LOW
LD3 not normally used.
First attempt to use ROM in this early generation chip. Loop downmix was still required due to slow divider speed.
Binary inputs are converted by ROM to a divisor in the 1,200 range. Internal pull-down resistors on the program pins.
The PLL08A has only the first 22 FCC channels stored in ROM for the European specs; otherwise both chips identical.
Not modifiable unless you disconnect the 10.240 MHz signal where it enters the Mixer, replacing it with an external
oscillator of your own.
NOT worth the trouble!
*** | 1 | 18 | FIL |
Vdd | 2 | 17 | Vss |
Fin | 3 | 16 | P0 |
RI | 4 | 15 | P1 |
RO | 5 | 14 | P2 |
FS** | 6 | 13 | P3 |
**** | 7 | 12 | P4 |
LD* | 8 | 11 | P5 |
P7 | 9 | 10 | P6 |
* 1 = Locked, 0 = Unlocked.
** 0 = 10 KHz steps, 1 = 5 KHz steps.
*** AFC: Helps bring loop into lock. It is connected to VCO circuit.
**** APC (Automatic Phase Control) switch.
PD output feeds through this switch to VCO after lock-up.
An early chip custom-made by Resdel, parent company of Fanon-Courier Corporation.
Used simple 8-bit binary programming with internal pull-down resistors on the pins.
Easy modification by changing the binary programming.
SM5104 (NPC)
MC145104 (Motorola)
MM55104 (National)
MN6040A (Panasonic)
ECG1255 (Sylvania)
Vdd | 1 | 16 | Vss |
Fin | 2 | 15 | P0 |
RI | 3 | 14 | P1 |
RO | 4 | 13 | P2 |
FS* | 5 | 12 | P3 |
PD | 6 | 11 | P4 |
LD** | 7 | 10 | P5 |
P7 | 8 | 9 | P6 |
* 1 = 10 KHz steps, 0 = 5 KHz steps.
** 1 = Locked, 0 = Unlocked.
Another member of the motorola family, almost identical to the PLL02A with one less binary bit but an on-chip oscillator for the 10.240 MHz input.
Internal pull-down resistors on the program pins. Negative-going PD output to the
VCO.
Easy modification by changing programming.
SM5107 (NPC)
MC145107 (Motorola)
MM55107 (National)
Vdd | 1 | 16 | Vss |
Fin | 2 | 15 | P0 |
RI | 3 | 14 | P1 |
1/2R | 4 | 13 | P2 |
FS* | 5 | 12 | P3 |
PD | 6 | 11 | P4 |
LD** | 7 | 10 | P5 |
P7 | 8 | 9 | P6 |
* 1 = 10 KHz steps, 0 = 5 KHz steps.
** 1 = Locked, 0 = Unlocked.
Another member of the Motorola family, but never very popular. Similar to the PLL02A, this one also requires an
external Reference Oscillator circuit. It has 8 bits of binary programming with internal pull-down resistors on the pins.
This one also includes provision for the 5.12 loop mixing output signal. Negative going PD output to the
VCO.
Modification by changing the binary programming.
SM5118
(NPC)
Vdd | 1 | 18 | Vss |
Fin | 2 | 17 | P1 |
RI | 3 | 16 | P2 |
RO | 4 | 15 | P3 |
1/2R | 5 | 14 | P4 |
RB | 6 | 13 | P5 |
PD | 7 | 12 | P6 |
LD* | 8 | 11 | P7 |
NC | 9 | 10 | P8 |
*1 = Locked, 0 = Unlocked
Almost identical to the MM55108, minus the T/R pin.
Easy modification by changing the binary programming.
Tied HIGH | 1 | 24 | Tied LOW |
SEG-A | 2 | 23 | Step UP |
SEG-B | 3 | 22 | Step DOWN |
SEG-C | 4 | 21 | Channel 9 |
SEG-D | 5 | 20 | Channel 19 |
SEG-E | 6 | 19 | T/R** |
SEG-F | 7 | 18 | LD* |
SEG-G | 8 | 17 | PD |
Vss | 9 | 16 | AI |
RO | 10 | 15 | AO |
RI | 11 | 14 | Vdd |
VSB (gnd) | 12 | 13 | Fin |
*1 = Locked, 0 = Unlocked
**R=1, T=0 and Pins 20-23 only active when LOW
A newer ROM chip which is identical in operation to the TC9106. The only real differences are the inclusion of Channel 9
and Channel 19 pins (like the LC7131), 7 programming bits instead of 8, and UP/DOWN step pins. The step pins are required here because they
have eliminated the expensive channel selector switch.
NOT easily modified.
RI | 1 | 18 | Vss |
RO | 2 | 17 | P7 |
Vdd | 3 | 16 | P6 |
LD* | 4 | 15 | P5 |
PD | 5 | 14 | P4 |
AI | 6 | 13 | P3 |
AO | 7 | 12 | P2 |
T/R** | 8 | 11 | P1 |
Fin | 9 | 10 | P0 |
*1 = Locked, 0 = Unlocked
**T = 1, R = 0
A newer ROM chip like the TC9106. The big difference is that this circuit shifts the VCO from 16 MHz on RX,
directly to 27 MHz on TX by switching different inductances across the VCO coil.
This saves the expense of one extra mixer stage. A 27 MHz VCO is extremely difficult to decouple on TX, however,
resulting in possible spurious FM of the carrier. A VERY CHEAP DESIGN.
NOT modifiable.
TC5080P (Toshiba)
Substitute: ECG1207 (Sylvania)
P0 | 1 | 16 | Vdd |
P1 | 2 | 15 | |
P2 | 3 | 14 | |
P3 | 4 | 13 | |
P4 | 5 | 12 | |
P5 | 6 | 11 | |
P6 | 7 | 10 | DO* |
P7 | 8 | 9 | Vss |
*Divider Output to TC5081
A simple binary Programmable Divider, used along with the TC5081 Phase Comparator
and the TC5082 Reference Oscillator and Divider.
TC9102
(Toshiba)
Vdd | 1 | 18 | Vss |
Fin | 2 | 17 | *** |
RI | 3 | 16 | P0 |
1/2R | 4 | 15 | P1 |
*** | 5 | 14 | P2 |
PD | 6 | 13 | P3 |
AI | 7 | 12 | P4 |
AO | 8 | 11 | P5 |
LD* | 9 | 10 | T/R** |
*1 = Locked, 0 = Unlocked
**T = 1, R = 0
***Tied LOW
Uses 5-bit binary programming with Programmable Divider preset to 91 + N in Receive mode and 182 + N in Transmit mode to produce 455 KHz T/R offset.
Standard 16 MHz VCO. Requires external 10.24 MHz Transistor oscillator.
TC9103
(Toshiba)
Vdd | 1 | 18 | Vss |
RI | 2 | 17 | Fin |
RO | 3 | 16 | *** |
1/2R | 4 | 15 | P0 |
PD | 5 | 14 | P1 |
AI | 6 | 13 | P2 |
AO | 7 | 12 | P3 |
LD* | 8 | 11 | P4 |
T/R** | 9 | 10 | P5 |
*1 = Locked, 0 = Unlocked
**T = 1, R = 0
***Tied LOW
Very similar to the TC9102, this chip also uses a 5-bit binary channel program with the Programmable Divider preset to 182 + N for Receive
and 273 + N for Transmit to give the 455 KHz T/R offset. Internal division is 5 KHz. Unlike the TC9102,
this chip contains its own oscillator, with only the 10.240 MHz external crystal required.
Compare with the TC9106, TC9109 and TC9119 which are basically identical but use a ROM code converter to prevent
modification.
TC9106 (US)
TC9119 (UK)
(Toshiba)
Vdd | 1 | 18 | Vss |
RI | 2 | 17 | P7 |
CL*** | 3 | 16 | P6 |
LD* | 4 | 15 | P5 |
PD | 5 | 14 | P4 |
AI | 6 | 13 | P3 |
AO | 7 | 12 | P2 |
T/R* | 8 | 11 | P1 |
Fin | 9 | 10 | P0 |
*1 = Locked, 0 = Unlocked
**T = 1, R = 0
***Tied to ground by a capacitor, which determines the time constant for LD pin.
The beginning of the impossible chips! Uses double-ROM set which protects against illegal programming
and also allows compatibility with 8-bit rotary LED Channel Selector. Chips use direct division of a 16 MHz VCO, 5 KHz steps,
and the only difference between them is the ROM N-codes needed to divide down the different US/UK VCO frequencies.
Impossible to modify!
TC9109 (Toshiba)
MB8733 (Fujitsu)
Vdd | 1 | 18 | Vss |
RI | 2 | 17 | P7 |
CL*** | 3 | 16 | P6 |
LD* | 4 | 15 | P5 |
PD | 5 | 14 | P4 |
AI | 6 | 13 | P3 |
AO | 7 | 12 | P2 |
T/R* | 8 | 11 | P1 |
Fin | 9 | 10 | P0 |
*1 = Locked, 0 = Unlocked
**T = 1, R = 0
***Tied to ground by a capacitor, which determines the time constant for LD pin.
Very similar to the TC9106, the only difference is a special /2 circuit following the reference Divider output inside the chip.
The T/R count shifts up by 2,139 but then is divided in half, resulting in an output in the Transmit mode
which can easily be doubled to provide the direct on-channel frequency.
µPD858
(NEC)
Sub: ECG1254 (Sylvania)
LD* | 1 | 24 | (5) |
PD(2) | 2 | 23 | Vss |
AI | 3 | 22 | P9 |
AO | 4 | 21 | P8 |
PD(3) | 5 | 20 | P7 |
(1) | 6 | 19 | P6 |
FS(4) | 7 | 18 | P5 |
1/2R | 8 | 17 | P4 |
RI | 9 | 16 | P3 |
RO | 10 | 15 | P2 |
Fin | 11 | 14 | P1 |
Vdd | 12 | 13 | P0 |
*0 = Locked, 1 = Unlocked
(1) Reference Divider Output
(2) Output
(3) Input
(4) 1 = 10 Khz steps, 0 = 5 KHz steps
(5) Programmable Divider Output
Used in one of the most popular Uniden chassis ever made. EASY TO MODIFY, and very
broadbanded. Uses BCD programming with a potential of 399 channels. Program pins must be controlled externally with pull-down resistors.
More features in this chip than have ever been used. Many internal chip functions are brought out to pins
to make troubleshooting easier. No longer allowed in the new US rigs, this chip now being widely used in Europe (mostly by President)
where an extra 40 or 80 channels and FM are added.
µPD861
(NEC)
Sub: ECG1254 (Sylvania)
P1 | 1 | 24 | (1) |
P2 | 2 | 23 | Vss |
P3 | 3 | 22 | LD* |
P4 | 4 | 21 | PD |
P5 | 5 | 20 | AI |
P6 | 6 | 19 | AO |
P7 | 7 | 18 | (5) |
P8 | 8 | 17 | (2) |
1/2R | 9 | 16 | (3) |
RI | 10 | 15 | (4) |
RO | 11 | 14 | MS** |
Vdd | 12 | 13 | Fin |
* 1 = Locked, 0 = Unlocked
** Mode Select: 1 = 40 Channel BCD/ROM,
0 = 8-bit binary (n of 3 to 255) using pins 1-8.
(1) Inhibit. Goes HIGH in BCD/ROM mode for non-legal program.
Disconnect if not disconnected already.
(2) Reference Divider output
(3) PD in from Reference Divider
(4) Programmable Divider Output
(5) PD in form Programmable Divider
Another versatile chip, not seen much today. For rigs already in Binary mode,
it is a simple matter to expand by changing the binary programming. For the BCD/ROM rigs,
ground pin 14 and you can use all programming bits (pins 1-8). Many of the chip's internal functions
brought out to pins, thus making troubleshooting easier.
µPD2810
(NEC)
P1 | 1 | 24 | Fin |
P2 | 2 | 23 | Vss |
P3 | 3 | 22 | FS*** |
P4 | 4 | 21 | AO |
P5 | 5 | 20 | AI |
P6 | 6 | 19 | PD |
P7 | 7 | 18 | Vdd |
T | 8 | 17 | LD**** |
Q | 9 | 16 | 1/2R |
IFS* | 10 | 15 | RB |
T/R** | 11 | 14 | RI |
Vdd | 12 | 13 | RO |
* IF Select: 1 = 10.695 MHz, 0 = 9.785 MHz
** R = 1, T = 0
*** 1 = 10 KHz Steps, 0 = 5 KHz Steps
**** 1 = Locked, 0 = Unlocked
A very versatile chip no longer seen in the US, but showing up in European rigs.
Uses 7-bit BCD/ROM programming with internal pull-down resistors on these and the IFS pins. Very similar in mixing concepts to the LC7120.
Notice the 455 KHz may shift up OR down on TX relative to whether the IF is above or below the 10.24 MHz reference signal.
For SSB use, the T/R and ½R pins are not used; instead an actual crystal oscillator provides loop mixing.
µPD2812
(NEC)
Vdd | 1 | 22 | RO |
Fin | 2 | 21 | RI |
M* | 3 | 20 | 1/2R |
PO | 4 | 19 | P8 |
DO | 5 | 18 | P7 |
AO | 6 | 17 | P6 |
AI | 7 | 16 | P5 |
PD | 8 | 15 | P4 |
LD** | 9 | 14 | P3 |
Vss | 10 | 13 | P2 |
I*** | 11 | 12 | P1 |
*Mode Select: 0 = Binary, 1 = 40 Channel BCD/ROM
** 1 = Locked, 0 = Unlocked
***Inhibit. Goes LOW if illegal BCD code is present in the ROM mode.
Another versatile chip now extinct, this one allows a choice of binary (N = 3 to 255)
or BCD/ROM (N = 182 to 226) programming, controlled by the level on Pin 3.
Program pins use internal pull-up resistors.
µPD2814
(NEC)
HD42K53 (Hitachi)
KM5624
P1 | 1 | 22 | Rin |
P2 | 2 | 21 | Vss |
P3 | 3 | 20 | FS*** |
P4 | 4 | 19 | AO |
P5 | 5 | 18 | AI |
P6 | 6 | 17 | PD |
T | 7 | 16 | Vdd |
Q | 8 | 15 | LD** |
T/R* | 9 | 14 | RB |
1/2R | 10 | 13 | RI |
Vdd | 11 | 12 | RO |
* R = 1, T = 0
** 1 = Locked, 0 = Unlocked
*** 1 = 10 KHz Steps, 0 = 5 KHz steps
Another versatile chip similar to the mPD2810. Was originally intended for AM or SSB rigs,
but to date has only been used for AM. Uses 6-bit BCD/ROM programming with internal pull-down
resistors. Pull-up resistors used on the T/R and FS pins. Australian rigs may use HD42856
which is identical but only has 18 channels stored in ROM.
µPD2816 (NEC)
P1 | 1 | 22 | Rin |
P2 | 2 | 21 | Vss |
P3 | 3 | 20 | FS*** |
P4 | 4 | 19 | AO |
P5 | 5 | 18 | AI |
P6 | 6 | 17 | PD |
T | 7 | 16 | TC**** |
Q | 8 | 15 | LD** |
T/R* | 9 | 14 | RB |
1/2R | 10 | 13 | RI |
Vdd | 11 | 12 | RO |
* R = 1, T = 0
** 1 = Locked, 0 = Unlocked
*** 1 = 10 KHz steps, 0 = 5 KHz steps
**** TC is a second unbuffered LD normally just tied high.
Another versatile chip but quickly fading away in AM use for the more secure chips.
Uses 6-bit BCD/ROM programming with internal pull-up resistors on the T/R, FS, and programming pins.
With FS HIGH, divider uses 10 KHz steps with N-codes of 91 to 135. With FS LOW,
N-codes are 182 to 270 when T/R is 1, and 273 to 361 when T/R is 0, yielding the 455 KHz AM IF offset.
For SSB use, the T/R pin is not required. Modify the SSB units by switching the state of the T/R pin:
This will give 40 channels beginning 455 KHz below channel 1.
µPD2824
(NEC)
P1 | 1 | 22 | Rin |
P2 | 2 | 21 | Vss |
P3 | 3 | 20 | NC |
P4 | 4 | 19 | AO |
P5 | 5 | 18 | AI |
P6 | 6 | 17 | PD |
T | 7 | 16 | TC** |
Q | 8 | 15 | LD* |
NC | 9 | 14 | RB |
1/2R | 10 | 13 | RI |
Vdd | 11 | 12 | RO |
* 1 = Locked, 0 = Unlocked
** TC is a second unbuffered LD normally tied HIGH
This is a cheap version of the µPD2816 and is pin for pin identical except that it doesn't have the T/R pin. The only N-codes are 91 to 135.