The µPD861 PLL

Not a lot has been written about this versatile PLL chip.  When a novice hack goes to modify the chip for frequency expansion, they often shake their head at the frequencies showing up on their freq. counter as they spin the channel selector.  There's a reason for that, and we are going to find out why.

First of all let's examine the pinout of the uPD861 PLL, mfg. by NEC:
Sub: ECG1254 (Sylvania)

* 1 = Locked, 0 = Unlocked
** Mode Select: 1 = 40 Channel BCD/ROM,
0 = 8-bit binary (n of 3 to 255) using pins 1-8.
(1) Inhibit. Goes HIGH in BCD/ROM mode for non-legal program.
Disconnect if not disconnected already.
(2) Reference Divider output
(3) PD in from Reference Divider
(4) Programmable Divider Output
(5) PD in form Programmable Divider

The first thing notable about this chip is that it has two modes of programming:  Straight binary (with an 'n' of 3 to 255) or BCD/ROM (with the only 'n' codes available being 91-135).  The 'mode' of this chip (binary/BCD) is determined by voltage (~+8VDC) present at pin 14.  If +, then BCD/ROM. If pin 14 is grounded, then straight binary programming may be used.  There is another gotcha here:  In BCD/ROM mode 'n' is preset to 90 plus 'n', such that on channel ONE, the only programming pin on the chip that has +DC is pin one, leading you to believe that 'n' is '1' instead of '91'.  Also, in BCD/ROM mode, programming is six bit, with only the first six programming pins used. The state of bits 7 and 8 in BCD mode are ignored.

The above is great, but what does that mean?  Can I modify this thing?  Will it be a useful mod? Yes and Yes.
As mentioned by others, there is no cookbook method for modifying this chip documented anywhere.  If the rig is already in binary mode, then follow binary programing modification of PLL chips that has been documented ad nauseum elsewhere.

Here is a partial chart of which rigs are which:

We're going to talk about modifying the frequency coverage of a Rig with the PLL in BCD/ROM mode.  'n' codes will be 91-135 for the US rigs.

The first step is to disconnect pin 24 of the PLL from the circuit board.  Do this by cutting the foil trace that leads to the pin or desolder the pin or cut the pin.  Careful.  This disables the inhibit function of this chip which shuts down the VCO should an illegal program be present.

The second step is to purchase a SPDT (or use a convenient switch inside the radio such as a Tone or NB switch) to control whether the PLL is operating in BCD/ROM or Binary mode.  Do this by isolating pin 14 (the 'mode select' pin) on the PLL.  Connect this pin via a wire to the middle leg of your SPDT switch.  Connect the bottom leg to an 5-8v power source such as pin 12 of the PLL.  Connect the top leg of your SPDT switch to circuit board ground, such as pin 23 of the PLL.  Should look something like this:
(SW1)

S    	|_____GND
	|
P	|_____Pin 14 of uPD861
	|
D	|_____+DC
	|
T	|

The above switch will control whether the rig is in BCD/ROM ('Normal' 40 Channel) mode or Binary Mode. (High and Low Frequencies!!!)  There's more to do yet, but you can test your rig to see if everything operates as normal with the switch in the down position.  At this point, putting the switch in the 'up' position will most likely change the chip programming so dramatically that the VCO will shut down.  That is perfectly normal at this point.

The third step is to control the states of PLL pins 7 and 8 while the rig is in Binary Programming Mode (1st switch in 'up' position).  Doing this will allow us to go below and well above the normal FCC channels, and we'll see why a little later.  You'll need a DPDT switch.  If there is a convenient switch of this type in the radio, then by all means use it.  Otherwise, obtain a switch and mount it in a secure location in the radio.  Isolate pins 7 and 8 of the uPD861 PLL by cutting their foil traces on the circuit board near the PLL pins. Also make sure that pins 7 and 8 are isolated FROM EACH OTHER, as they are often soldered to ground on the circuit board by a common 'pad' of solder.   Hook up your DPDT switch as follows:
(SW2)

After you have this switch hooked up, it will be time to test the 'new' frequencies of the rig.  As I mentioned earlier, this is where some people get flummoxed when they observe the new frequencies on a freq. counter. The frequencies don't follow the normal 450 KHz 'pattern' of the FCC legal 40 channels.  The explanation of this lies in the 'n' code the PLL is receiving.  When the first switch is in the down, or 'normal' position, everything works like a stock radio.  But when the Binary Mode is selected and the second switch is in the 'upper' or 'high' position, a band of frequencies is produced, but the progression of the frequencies doesn't make sense (at first).  The explanation for all of this can be obtained by the 'truth chart' I have prepared below.  Teamed with this chart and the knowledge that you are using a BCD channel selector and  that you have forced the  PLL into binary mode will shed some light on the frequency progression.

Truth and Frequency Chart for the 'new and improved' uPD861c:

Armed with the above data, you can see that the uPD861 chip is very desirable, indeed.  Notice the expanded frequency coverage of these rigs is almost exactly what is known as the "Free Band".  Hopefully you now can commence to modifying some of those old rigs amd getting them back on the air.  Happy DXing!